FIGS. 5(a) to 5(e) are sectional views illustrating process steps in a conventional method for producing a heterojunction bipolar transistor (hereinafter referred to as HBT).
Initially, an n type GaAs collector layer 2 about 1 micron thick, a p type GaAs base layer 3 about 1000 angstroms thick, and an n type AlGaAs emitter layer 4 about 3000 angstroms thick are successively grown on a semi-insulating GaAs substrate 1 by epitaxial growth. Then, a tungsten silicide (WSi) film 5 4000.about.5000 angstroms thick is deposited on the emitter layer 4 by sputtering, and an SiO film 6 1000.about.2000 angstroms thick is deposited on the WSi film 5 by chemical vapor deposition (CVD). Thereafter, the WSi film 5 and the SiO film 6 are patterned in a desired shape by conventional photolithography and reactive ion etching (RIE) using fluorine gas (FIG. 5(a)).
Using the WSi film 5 and the SiO film 6 as a mask, the emitter layer 4 is etched by RIE using Cl.sub.2 gas or wet etching using, as an etchant, a mixture of tartaric acid and hydrogen peroxide, leaving portions 41 on the base layer 3 (FIG. 5(b)). The remaining emitter layer 41 has to be as thin as 500 angstroms so that it is sufficiently depleted when the device operates. The etching process of FIG. 5(b) is referred to as a first base etching, hereinafter.
Then, an insulating film, such as SiN, is deposited on the whole surface of the substrate and patterned to form side walls 7. Using the side walls 7 as a mask, the emitter layer is etched to expose the surface of the base layer 3. This etching process is referred to as a second base etching, hereinafter. Thereafter, a base metal 11, such as Ti/Mo/Au, is deposited on the entire surface to a thickness of about 1500 angstroms (FIG. 5(c)).
Then, a photoresist is deposited on the substrate, patterned, and annealed to form a photoresist pattern 12 that covers the surface of the base metal layer 11 except for the emitter region (FIG. 5(d)).
Using the photoresist pattern 12 as a mask, a portion of the base metal layer 11 is removed by sputtering using Ar ions (hereinafter referred to as ion milling), forming base electrodes 111. During the ion milling, the SiO film 6 prevents the WSi film 5 as an emitter electrode from being etched. Then, unnecessary portions of the SiO film 6 and the side walls 7 are removed to complete the structure of FIG. 5(e). The thin portions of the emitter layer 4 remaining under the side walls 7 are depleted when the device operates and prevent generation of a recombination current in that region.
A description is given of the operation.
Generally, a high-speed bipolar transistor is achieved by reducing the base width, but the reduced base width causes an increase in the base resistance. In order to reduce the base resistance, it is necessary to increase the impurity concentration of the base layer. In a bipolar transistor comprising a single material, the increase in the impurity concentration of the base layer decreases the resistance of the whole base layer, so that holes injected from the base to the emitter increase and the current gain decreases. In the HBT, however, the injection of holes from the base to the emitter is suppressed by a difference in energy band gaps between the base and the emitter.
FIG. 6 is an energy band diagram for explaining the above-described operation of the HBT. In FIG. 6, an n type AlGaAs emitter layer (E) is formed on a p type GaAs base layer (B), and the energy band gap of the emitter (E) is wider than the energy band gap of the base (B) and the collector (C). When a forward bias is applied between the base (B) and the emitter (E), electrons in the AlGaAs emitter (E) region are easily injected into the GaAs base (B) region because the potential barrier .DELTA.E.sub.1 is small, but holes in the GaAs base (B) region are hardly injected into the AlGaAs emitter (E) region because of the presence of the large potential barrier .DELTA.E.sub.2. In this case, since the emitter current is an electron injecting current, a high current gain .beta. is achieved.
In the HBT shown in FIG. 5(e), if high impurity concentration regions are selectively formed, by ion implantation, in the base layer 3 whereon the base electrodes 111 are present, the base resistance is reduced while maintaining the heterojunction structure. However, since the maximum impurity concentration achieved by the ion implantation is only 4.times.10.sup.17 cm.sup.-3, the base resistance is not sufficiently reduced. In addition, the ion implantation adversely affects the base layer.
In order to avoid the above-described problems of the ion implantation, a solid phase diffusion method has been employed to produce the high impurity concentration region in the base layer. FIGS. 7(a) to 7(h) illustrate a method for producing an HBT using the solid phase diffusion method.
The steps illustrated in FIGS. 7(a) and 7(b) are identical to those already described with respect to FIGS. 5(a) and 5(b) and, therefore, do not require repeated description.
As illustrated in FIG. 7(c), an insulating film, such as SiN, is deposited over the substrate and etched to form first side walls 7.
Then, as illustrated in FIG. 7(d), a zinc oxide (ZnO) film 8 is deposited to a thickness of about 1000 angstroms by sputtering and annealed. During the annealing, Zn atoms diffuse into the underlying base layer 3, forming Zn diffused regions 9 having a high impurity concentration of 4.times.10.sup.19 .about.4.times.10.sup.20 cm.sup.-3. Since the Zn atoms also diffuse into the thin portions 41 of the n type emitter layer 4, these portions are turned p type. An SiO film about 1000 angstroms thick is sometimes formed on the ZnO film 8 to prevent Zn atoms from diffusing into the atmosphere.
Then, the ZnO film 8 is removed with hydrofluoric acid. At this time, the SiO film 6 and the first side walls 7 are unfavorably removed with the ZnO film 8 as shown in FIG. 7(e). Therefore, second side walls 10 comprising SiN or the like are formed on opposite sides of the emitter layer 4 and the WSi layer 5 (FIG. 7(f)).
Using the second side walls 10 as a mask, the emitter layer 41 is etched to expose the base layer 3 (second base etching). Thereafter, a base metal 11 is deposited on the whole surface of the substrate, and a photoresist is deposited thereon, patterned, and annealed to form a photoresist pattern 12 as shown in FIG. 7(g).
Then, the base metal 11 is selectively removed by ion milling using the photoresist pattern 12 as a mask, forming base electrodes 111. Since the SiO film 6 on the WSi film 5 has been removed in the step of FIG. 7(e), the WSi film 5 is subjected to the ion milling and unfavorably etched as shown in FIG. 7(h).
As described above, when the solid phase diffusion process is applied to the conventional method of producing the HBT, the SiO film 6, which would serve as an etching stopper layer when the base metal is removed by ion milling, is unfavorably removed when the ZnO film 8 is removed with hydrofluoric acid. Therefore, the WSi layer 5, i.e., the emitter electrode, is etched during ion milling. As a result, the resistance of the emitter electrode increases, adversely affecting the electrical characteristics of the HBT.